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Equations are available to subscribers only. A comparison between representative experimental points and theory for lines B 1 , B 2 , and B 3 for GaAs. Comparison between experiment and theory for lines other than B 1 , B 2 , B 3. Login or Create Account. Allow All Cookies. Journal of the Optical Society of America Vol. Skolnick, A. Carter, Y. Couder, and R. Stradling, "A high-precision study of excited-state transitions of shallow donors in semiconductors," J. Not Accessible Your account may give you access.
Abstract Submillimeter laser and carcinotron sources have been used to study Zeeman transitions originating and terminating on the excited states of shallow-donor impurities in a variety of III—V and II—VI semiconductors.
Fermi function for donor states
Laser optogalvanic spectroscopy of the even-parity Rydberg states of atomic mercury M. More Recommended Articles. One electron and discrete excitonic contributions to the optical response of semiconductors around E 1 transition: analysis in the reciprocal space L. References You do not have subscription access to this journal.
Cited By You do not have subscription access to this journal. Figures 7 You do not have subscription access to this journal. Tables 3 You do not have subscription access to this journal. Equations 1 You do not have subscription access to this journal. Journal of the Optical Society of America. Characteristics of samples employed.
Please login to set citation alerts. The crystal defects existing in the bulk silicon material have not been depicted on the drawings. These defects become built into the epitaxial layer as it is grown on the substrate. When N-type impurities are diffused in from the surface of the epitaxial layer to form the emitter diffusion. It has been shown by Oueisser et al. What occurs is the formation of spikes 21 extending downward from the main emitter base junction in varying distances in the base regions.
If these spikes prolongatc with gettered donor impurities. Au and Al are often present in the semiconductor bulk material. Copper impurities may result. In this invention. What characterizes these metallic impurities represented by points 24 is their ability to migrate within the semiconductor material. The same transistor structure has been represented in FIG.
In this structure. The introduction of stress centers close to the upper surface result in the formation of dislocations to relieve the stresses. The gettering properties of dislocations have been demonstrated above according to Cottrells work.
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High temperature diffusions of large concentration of substitutional impurities into shallow surface layers ot'silicon produce dislocations. The high dislocation density for the case of a shallow diffusion with high concentration must involve both undersized or oversized substitutional impurity atoms. Samples of undersized atoms are boron and phosphorous. Dopants with small misfits in sil icon. In addition to the size of impurity to be introduced. The chosen impurities must have a relatively high maximum solubility. This is the case for boron and phosphorous; therefore the amount of maximum stress introduced by them can easily exceed the elastic limit of silicon.
An impurity gradient with a concentration superior to a critical limit is necessary for the generation of dislocations. According to the literature. This way has been chosen here. Dislocations which also act as recombination centers will not have action on the effective base region. The stressed volume introduced by this diffusion will getter impurities contained in the active device volume.
The typical impurity concentration profiles along line ' have been plotted on FIG. The initial emitter concentration profile is referenced by the dotted line Only the emitter concentration profile is modified. The profile along line ' has been represented by a dotted line to the base and collector concentrations for exemplary purposes only. A small diminution of the surface concentration of N-type dopant is normally noticed. The effective emitter concentration will still be l.
The impurity profile under the base contact along line 55' is shown in FIG. The initial base concentration profile is represented by dotted line 3] and the stress center diffusion by line The final profile resulting from this additional diffusion is represented by full line Other processes may be considered to introduce stress centers.
While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention. A method of gettering impurities. The method of claim I wherein said openings in said masking layer are contact openings for the collector.
The method of claim I wherein said substitutional impurity atoms are undersized atoms selected from the group consisting of born and phosphorous. The method ofclaim I wherein said substitutional atoms are introduced by diffusion techniques. The method of claim 1 wherein said substitutional impurity atoms are comprised of electrically neutral species.
Shallow Impurity Centers In Semiconductors Baldereschi A Resta R (ePUB/PDF)
A method for gettering impurities in a semiconductor device to prevent the formation of pipes. United States Patent dHervilly et al. Filed: June 25, Appl. What is claimed is: 1. The method ofclaim I wherein said substitutional atoms are introduced by ion bombardment. The method of claim 1 wherein said openings in said masking layer are contact openings for the collector, base and emitter contacts.
The method of claim 1 wherein said substitutional impurity atoms are undersized atoms selected from the group consisting of born and phosphorous.
The method of claim 1 wherein said substitutional atoms are introduced by ion bombardment. The method of claim 1 wherein said substitutional atoms are introduced by diffusion techniques. Method of gettering impurities in semiconductor devices introducing stress centers and devices resulting thereof. USA en. FRA1 en. Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions. Method of increasing the gettering effect in the bulk of semiconductor bodies utilizing a preliminary thermal annealing step.
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